Particle Beam Heating to Identify Defects

ABSTRACT

A charged particle beam, such as an electron beam or an ion beam, scans a device while a signal is applied to the device. As the particle beam scans, it locally heats the device, altering the local electrical characteristics of the device. The change in electrical characteristic is detected to and correlated to the position of the electron beam to localize a defect.

TECHNICAL FIELD OF THE INVENTION

The present invention relates to fault analysis in integrated circuitsand more specifically, to identifying and determining the location ofresistive interconnect faults.

BACKGROUND OF THE INVENTION

Defect identification and localization refers to determining theexistence of a defect and pinpointing its location within an integratedcircuit. Various techniques have been developed for defectidentification and localization. Some techniques rely on the fact thatthermal characteristics of a defective circuit region can differ fromthe thermal characteristics of defect-free circuit. By scanning a laserto locally heat a small region of the circuit, and monitoring somecharacteristic of the circuit, the change in the characteristic can becorrelated to the position of the laser in its scan, thereby determiningthe location of the defect. Several scanning laser-based thermaltechniques have been used to localize defects.

For example, in Optical Beam-Induced Resistance Change (OBIRCH), aconstant voltage is applied to the circuit while the current ismonitored during the laser scan. Some change in current is expected fromthe heating as the laser scans and heats different points of thecircuit, but an abnormal change in current may indicate a defect at thatscan position. A large change in current can be caused, for example, bya void or an open metal line which impedes the heat dissipation fromthat spot. By correlating the laser position in the scan with the changein current, the position of the defect can be found.

In a similar technique, Thermally-Induced Voltage Alteration (TIVA), aconstant current source is applied to the circuit. Localized heating bythe scanning laser increases the resistivity of shorts, resulting inincreased power consumption. The location of the short is determined bycorrelating the position of the scanning laser when the powerconsumption changed.

Various optical probing techniques for fault localization are describedin, for example, U.S. Pat. No. 6,444,895 for “Irradiation surfaces withlaser beams; nondeforming detection of defects;” U.S. Pat. No. 6,549,022for “Apparatus and method for analyzing functional failures inintegrated circuits;” U.S. Pat. No. 6,593,156 for “Non-destructiveinspection method;” U.S. Pat. No. 7,062,399 for “Resistivity analysis;”and U.S. Pat. No. 7,825,673 for “Failure analysis method and failureanalysis apparatus.”

As described in U.S. Pat. No. 6,444,895, the lasers used typically havea wavelength longer than 1100 nm because such lasers are capable oftransmitting through silicon material used in semiconductor substratesand heating metal wires. The lateral resolution of laser-basedtechniques is limited by the spot size of the laser, which is limited byits wavelength. The laser spot size is typically about one micron indiameter, which can cover about 10 to 50 interconnect elements. Also, inthe time required to measure a scan point, the heat from the laser canspread several microns from the point of incidence of the beam. Thisthermal diffusion further limits the lateral resolution of opticaltechniques. The resolution of laser-based defect localization processesreduces their usefulness in modern integrated circuits.

Several techniques are utilized to improve the signal-to-noise ratio(SNR) of the OBIRCH and TIVA measurement. Such techniques include usinga lock-in amplifier, as described in U.S. Pat. No. 7,825,673 for“Failure analysis method and failure analysis apparatus.” If the laserbeam is pulsed, a lock-in amplifier can be used to improve the SNR atthe pulse frequency. Another technique uses a highly sensitive magneticfield detector, such as a Superconducting Quantum Interference Device(SQUID), for detecting small changes in current by detecting smallchanges in the magnetic field caused by the current. Such a technique isdescribed in U.S. Pat. No. 6,444,895 for a “Device and method fornondestructive inspection on semiconductor device.”

Another class of defect localization techniques uses an electron beam asa probe rather than a laser. The electron beam injects charges into theintegrated circuit, and the flow of those charges, which is altered bythe presence of defect, is detected to locate the defect. Unlike thermaltechniques, which can a test signal can be applied to the circuit and achange in the test signal caused by local laser heating of the circuitcan be detected, the detectable change in electron beam techniques islimited to the amount of current injected by the electron beam. Thedepth of penetration of an electron beam into a sample depends on theenergy of the electrons in the beam and so level of interconnect atwhich the electrons are absorbed can be controlled to some extent.

One electron beam technique, Resistive Contrast Imaging (RCI) uses anelectron beam having sufficient energy that the interaction volume, thatis, the region in which electrons from the beam scatter within thesample, reaches the buried layer of interest, thereby injecting chargesinto the circuit at the desired layer. The injected electrons create acurrent between the injection point and test nodes. RCI requires twoprobes, one on each end of the circuit being tested. As the electronbeam is scanned across the surface, the currents at the test nodes aremeasured to make a resistance map of the conductors. RCI is adifferential technique that indicates a change in the direction ormagnitude of the absorbed electron beam current. Because thedifferential current is relatively small, the signal amplifier must havea large gain, typically between 10⁹ and 10¹¹.

Biased RCI (BRCI) is similar to RCI, but the circuit is biased duringtesting. The bias is used to increase the observable signal contrastwhile doing RCI to detect opens. When the circuit is biased, theresistance difference becomes a logic map. The BRCI image of the deviceunder test is compared to a BRCI image of a known good device, and thedifference indicates the location of a defect.

RCI and BRCI are both used to detect resistive junctions in conductors.RCI and BRCI techniques measure the direction and magnitude of theabsorbed electron beam current as the electron beam is scanned acrossthe conductive elements that include the resistive junctions. With BRCI,since the scanning electron beam current that is absorbed by the faultycircuit is the signal of importance, the bias voltage across the faultycircuit needs to be low enough so that it does not cause a flow ofcurrent on its own that is more significant than the absorbed electronbeam current. RCI and BRCI therefore suffer from poor signal-to-noiseratio for ICs having higher current consumption. Because the electronbeam penetrates through passivation layers and other layers ofconductors to inject charges into subsurface conductors, RCI and BRCI donot require removing layers to expose the conductor layer being tested.The energetic electrons can, however, damage the circuit.

Charge-Induced Voltage Alteration (CIVA), described in E. I. Cole, Jr.and R. E. Anderson, “Rapid Localization of IC Open Conductors UsingCharge-Induced Voltage Alternation,” Proceedings of the 1992 IRPS (IEEE,1992), was devised to overcome the sensitivity limitation of BRCI. In anactive CMOS device, quantum tunneling may allow a circuit with an openconductor to function at low clock speeds. CIVA scans an electron beamto inject charges into subsurface conductors. When electrons areinjected into non-failing conductors, the additional current, on theorder of nanoamps, is readily absorbed and produces little change in thepower supply voltage. If an open, floating conductor is operating intunneling mode, however the injected charge produces additional loadingon a constant current power supply, causing a detectable change in powerconsumption. CIVA is therefore used to identify opens as the electronbeam modifies the potential on an interconnect feature that iscompletely disconnected from the rest of the IC.

The change in power consumption can be displayed on an SEM image of thedevice at the beam coordinates where the change was detected to show thefloating conductors superimposed over the SEM image. Injecting chargethrough the passivation layer and directly into the subsurface layerrequires a high energy electron beam, typically greater than 5 keV andoften 10 keV or greater. The high energy beam can damage the integratedcircuit.

Low Energy CIVA (LECIVA), as described in U.S. Pat. No. 5,523,694 for“Integrated circuit failure analysis by low-energy charge-inducedvoltage alteration,” was developed to avoid the radiation damage causedby the high energy, high current beam required in CIVA. LECIVA uses anelectron beam having insufficient energy to inject charged directly intothe interconnect layer below the passivation layer. The energy istypically about 0.3 keV to 1 keV and the current is relatively high, onthe order of a few tens of nanoamps. In LECIVA, the scanning low-energy,high-current electron beam changes the electrical potential at thedevice surface, which electrostatically induces a small voltage pulse onthe buried electrical conductor. The voltage pulse changes the voltageoutput of a constant-current power supply and the voltage signal can bedisplayed on an SEM image of the circuit.

Both CIVA and LECIVA utilize a constant-current source, the operatingvoltage of which changes in response to the charge on open interconnectelements caused by a focused electron beam directly (CIVA) or indirectly(LECIVA) through electrostatic coupling. In both cases (CIVA and LECIVA)open-circuit defects are identified and mapped as the focused electronbeam is scanned over an operating IC or sub-region thereof.

CIVA relies on the full system power-up of the device. In CIVA andLECIVA the entire integrated device is powered and the faulty part ofthe circuit in the form of an open or isolated conductor is readilyaltered by the scanning electron beam as it penetrates into the circuitor charges nearby surfaces. Since the faulty conductor is isolated inthe form of an open circuit, the electron beam directly or indirectlychanges the potential of the faulty conductor thereby causing the entireintegrated circuit to operate differently. This change is detected as achange in operational power consumption and is correlated with themomentary location of the scanning electron beam.

Another technique, Electron-Beam-Absorbed Current (EBAC) uses a widerange of electron beam energies and currents to visualize defects ininterconnect lines. EBAC can detect both surface defects and defectsburied under a dielectric. The beam energy controls the penetration ofthe beam and therefore the depth at which the current is injected.Measurements of current collected using a nanoprobe on a surfaceconductor are synchronized with the SEM raster to show the line opensand other interconnect elements shorted to the line. EBAC techniquesmeasure the electron beam current that is absorbed into the IC. In someimplementations, a voltage is applied only to help direct the absorbedelectron beam current.

Each of these techniques has its limitations. In CIVA, the current thatis monitored is the current that is flowing through the whole integratedcircuit and not just the current that is flowing through a few pathwayswhich include the defective conductive pathways of the integratedcircuits. CIVA requires a functional integrated circuit for operation.EBAC does not require forcing a test current through a faultyjunction—EBAC detects the current of charges injected by the electronbeam. Neither CIVA nor EBAC can localize resistive opens or resistiveshorts because the charge or absorbed current leaks out of the resistiveinterconnect feature, since the defect is not completely open. EBAC isalso insensitive to resistive faults because EBAC electric loop has avery high effective resistance, typically between about 10⁶Ω and 10¹³Ω.In both RCI and EBAC, the absorbed electron beam current is the onlysignal that is monitored.

A technique that provides high lateral resolution and that is capable ofdetecting resistive defects is needed.

SUMMARY OF THE INVENTION

An object of the invention is to provide a system for identifying andlocalizing a defect in an integrated circuit.

A charged particle beam, such as an electron beam or an ion beam, scansa device while a test signal is applied to the device. As the particlebeam scans, it locally heats the device, altering the local electricalcharacteristics of the device. The change in electrical characteristicis detected by a change in the test signal and correlated to theposition of the charged particle beam to localize a defect.

The foregoing has outlined rather broadly the features and technicaladvantages of the present invention in order that the detaileddescription of the invention that follows may be better understood.Additional features and advantages of the invention will be describedhereinafter. It should be appreciated by those skilled in the art thatthe conception and specific embodiments disclosed may be readilyutilized as a basis for modifying or designing other structures forcarrying out the same purposes of the present invention. It should alsobe realized by those skilled in the art that such equivalentconstructions do not depart from the scope of the invention as set forthin the appended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

For a more thorough understanding of the present invention, andadvantages thereof, reference is now made to the following descriptionstaken in conjunction with the accompanying drawings, in which:

FIG. 1 is a flow chart showing a method of defect identification andlocation.

FIG. 2 shows schematically an electron beam system for carrying outdefect identification and location.

FIG. 3 shows schematically front side EBIRCH with use of microprobes ornano-probes for applying an electrical signal to the DUT.

FIG. 4 shows schematically backside EBIRCH with use of probe card forapplying an electrical signal to the DUT.

FIG. 5 shows schematically identification and location of resistivemetal line defect using EBIRCH

FIG. 6A shows the identification and localization of a line-to-lineresistive short using EBIRCH. FIG. 6B shows the short in an EBIRCHimage.

FIG. 7 shows schematically identification and location of a resistiveline to via defect using EBIRCH

FIG. 8 is a superposition of an SEM image and an EBIRCH image showingdefect in 50 nm metal line.

FIG. 9 shows schematically front side EBIRCH with using a SQUID magneticsensor for EBIRCH current detection.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Charged particle beam induced resistivity change (CPBIRCH) is used toidentify resistive defects, that is, resistive shorts and resistiveopens, of conductive pathways. Resistive defects are defined as defectshaving a resistivity of between about 10Ω and about 10⁶Ω. A resistivedefect can be, for example, a resistive current path where no currentwas intended, or a resistive current path, where a highly conductivecurrent path was intended. As used herein, a resistive defect caninclude a defect having an impedance that includes a resistive aspect,and measuring resistance can include measuring impedance. CPBIRCH uses arelatively large test current flowing through the circuit path thatincludes the fault. In CPBIRCH, an electrical signal is applied to acircuit to provide a test current while the circuit is scanned by acharged particle beam, such as an electron beam for ElectronBeam-Induced Resistivity Change (EBIRCH) or an ion beam for IonBeam-Induced Resistivity Change (IBIRCH). The charged particle beamprobe locally heats the circuit where it impacts. The description belowis directed primary to EBIRCH, but a skilled person can adapt thetechniques described to IBIRCH from a basic knowledge of the differencesbetween how electron beams and ion beam react upon impacting a sample.In EBIRCH, the primary effect of the beam comes from locally heating theresistive defect, and not from injecting charge. The local heatingprovides a large change in the test current, which is change istypically much greater than the current in the electron beam.

In EBIRCH, an electrical signal is applied to a circuit to provide atest current while the circuit is scanned by an electron beam probe. Theelectron beam probe locally heats the circuit where it impacts. In priorelectron beam techniques such as CIVA and EBAC, the injected charge isdetected. In EBIRCH, the change in the resistive defect caused by heatis detected. The change in current caused by heating the resistivedefect is typically greater than the charge injected. The test currentthat is forced through the conductive pathway of the faulty junction istypically greater than the electron beam current, typically more than 10times greater, more typically more than 100 times greater, and oftenfrom 1,000 to 100,000 times greater than the electron beam current.

Unlike CIVA and EBAC, which identify a faulty interconnect feature thatis completely open, that is, completely disconnected from the rest ofthe IC, EBIRCH can identify resistive shorts and opens in which theinterconnect feature is not completely disconnected from the rest of theIC. The electron beam in EBIRCH can be focused to a much smaller spotthan the laser beam of OBIRCH, thereby improvising lateral resolution.

CIVA requires some functionality of the entire integrated circuit.EBIRCH does not require any active devices. EBIRCH only needs twopassive conductive materials that include a resistive junction thatconnect the two conductive materials. EBIRCH can be performed on anyconductors connected by a resistive region and therefore can beperformed on a portion of a circuit and even, for example, on aconductive layer after the silicon has been removed. A complete workingcircuit is not required.

Placement of the electrical probes in EBIRCH preferably isolates thepath of the test current to exclude most of the integrated circuit.EBIRCH relies on a locally injected test current that can flow throughmany interconnects but the faulty interconnect is required to be in thetest current path. Preferably all the test current flows through theresistive defect. In EBIRCH, electrons from the beam thermally heat aresistive defect to produce a significant resistance change. By applyinga voltage to force current through this path, the change in resistanceis observable as a change in the forced current. A focused electron beamhaving a spot size on the sample of several nanometers in diameter canlocalize the defect with high lateral resolution. In some cases, theoutput (current, voltage, power or impedance) of a power supply ismonitored, and the change in power supply output is amplified to becomethe EBIRCH signal. Because the EBIRCH signal is derived from heating thedefect and EBIRCH does not depend on detecting charge absorbed from thebeam, the ratio of beam absorbed current to test current does notcontrol the SNR, allowing for resistive defects to be detected. Becausethe change in test current caused by the heating is relatively large,the gain required for the amplification of the change in test current istypically less than 10⁶, more typically less than 10⁵ between about 10³and 10⁴. The amplifier gain is typically more than 1,000 or 10,000 timessmaller than the gain required of techniques, such as RCI, in which thesignal measured is related to the electron beam absorbed current.

Further, as the electron beam heating volume is small, the heat injectedby the electron beam creates a significant temperature increase in ashort period of time. This reduces the heat diffusion, which improveslateral resolution, and allows for shorter dwell times at each dwellpoint. Faster electron beam scans provide higher lateral resolution ofEBIRCH. For example, during a dwell period of 0.1 μs per pixel, which isrelatively fast SEM imaging, the calculated heat spread is on the orderof 200 nm in SiO₂. In practice, the heat spread can be less consideringdynamics of electron beam interaction with the defect. Since theelectron beam spot size is smaller than an IC feature size, EBIRCHresolution is essentially limited by the thermal diffusion of heat fromthe nanometer size electron beam interaction volume. Of course, fasterelectron beam scanning provides even greater improvement to lateralresolution. Preferred scan patterns can include, for example, dwelltimes ranging from about from 10 μs to 500 μs pixel sizes ranging fromabout a nanometer to about 500 nm The energy deposited by the electronbeam per unit of time can be varied by varying the electron beam currentand the electron beam landing energy. The landing energy also controlsthe penetration depth of the electron beam.

Novel scan patterns, such as patterns in which the pixels are notcontiguous, could improve resolution. Pulsing of the electron beam canfurther decrease the thermal spreading as well as provide a time varyingsignal where lock-in techniques can be employed to improve the SNR.

Table 1 below shows a comparison of typical OBIRCH and EBIRCH processparameters. The electron beam power of common SEM systems issignificantly lower than the power of lasers common used in OBIRCHsystem. The electron beam in EBIRCH therefore deposits significantlyless energy into the IC in a given time period than the laser beam ofOBIRCH deposits. Applicants have surprisingly found, however, that theenergy from the electron beam is sufficient to heat a resistive defectsufficiently to a detectable change in the test current. The electronbeam energy, while significantly smaller than the laser energy, isdeposited into a significantly smaller volume, which provides verylocalized heating. Applicants have found that the deposited energydensity (energy/volume), which determines the local (defect) temperaturerise, is comparable for EBIRCH and OBIRCH cases. Moreover, while theOBIRCH laser wavelength is chosen so the silicon substrate will berelatively transparent to the OBIRCH laser, the silicon and siliconcompounds are not transparent to the electron beam. While metals ingeneral have greater electron stopping power than silicon compounds, inan integrated circuit, energy is deposited in the silicon compoundsbefore the buried metal layer is reached by the electrons. Theselectivity between the metal and the dielectric of the energydistribution would be expected to be less with an electron beam thanwith a laser. Also, as metal lines in newer semiconductors get thinner,their thermal mass is lower and the lower energy in the electron beam isable to more rapidly increase the temperature of the conductor. OBIRCHis performed in atmosphere, where as EBIRCH or IBIRCH is performed in avacuum.

More powerful electron beam tools are readily available and can be usedfor EBIRCH when the requirement arises.

TABLE 1 OBIRCH EBIRCH Beam Dwell Time per pixel 2 μs to 30 μs 0.1 μs to1000 μs Power 100 mW 3 μW Energy/pixel 0.2 μJ to 3 μJ 0.3 pJ to 30 pJPixel Size 1 μm to 80 μm .03 μm to 0.3 μm Energy/volume 0.8 pJ/μm³ to 6× 10⁶ pJ/μm³ 20 pJ/μm³ to 2 × 10⁶ pJ/μm³ Image frame acquisition time0.08 s to 8 s Beam Current NA 1 nA to 5 nA Electron Landing Energy NA 2keV to 10 keV Test Current Ranges (Forced +/−100 μA to +/−100 mA +/−1 μAto +/−1 mA Voltage Mode) Test Voltage Ranges Forced Current Mode: 0 V toForced Current Mode: 0 V to 2 V 2 V Forced Voltage Mode: 0 V to 20 VForced Voltage Mode: 0 V to 20 V

In a typical EBIRCH analysis on an IC, a constant current or constantvoltage is applied to the whole IC or part of the IC or test structureas needed. The electron beam and the electrical probes can be applied tothe front side of the circuit, or the circuit can be flipped over, andthe electron beam applied to the backside of the circuit while theelectrical probes can still be connected to the front side, through theuse of a probe card. For front side electron beam stimulation, anelectrical signal can be applied through the IC package contacts.Micro-probing or nano-probing of depackaged and delayered IC's can alsobe used to apply the needed electrical settings to an IC area undertest. A sequential front side wafer level nano-probing can accomplish afailure analysis of resistive defects at each process step.

FIG. 1 is a flowchart 100 of a process using EBIRCH to localize adefect. The process can identify, for example, resistive shorts andresistive opens. In step 102, a sample is prepared. The preparationrequired depends on the sample and on the layer within the sample thatis being probed. For example, an integrated circuit may be removed fromits packaging and one or more layers removed as necessary to contact therequired conductors. For probing a flip chip from the backside, the ICsubstrate can be thinned to about 100 nm level or the silicon substratecan be completely removed to access bottom levels of interconnect.

In step 104, the sample is inserted into the vacuum chamber of anelectron beam system having multiple electrical probes. FIG. 2 showsschematically an electron beam system 200 that can be used to localize adefect using EBIRCH. Electron beam system 200 includes an electronfocusing column 202 having an electron gun 204 for emitting electrons,deflectors 206 for positioning and scanning an electron beam 208, and anobjective lens 210 for focusing the electron beam 208 onto spot on thesample 214 positioned on a moveable stage 216 within a vacuum chamber218.

In step 106, one or more electrical probes make electrical contact withthe conductor in the sample. FIG. 2 shows a first probe 220 that ismanipulated by a probe positioner 222. First probe 220 is connected to apower supply 224 that can function as a current source or a voltagesource. A second probe 230 is manipulated by a second probe positioner232. Second probe 230 is connected to an amplifier 234 that can detectan electrical signal originating from first probe 220 and modified bythe sample 214. Stage 216 can also be used to ground or apply a bias tosample 214.

In step 108, a signal is applied through first probe 220 to the circuitunder test. The signal can be AC or DC and could be a voltage or acurrent. For example, a constant DC current power supply may apply acurrent to the circuit. In step 110, the electron beam 208 is scannedover the sample. The electron beam has a landing energy of about 3 keVand a current of about 1 nA to provide a power of 3 μW. The beam isscanned such that the dwell time at each pixel is between about 0.1 μsand about 10 μs. The pixel size, which is determined by the spot size ofthe beam, is between 0.03 μm and 0.3 μm. The energy per volume istherefore between 20 pJ/μm³ and 2×10⁶ pJ/μm³. An image of 1024×768pixels therefore requires between 0.08 and 8 seconds to acquire.

As the electron beam scans, a secondary electron detector 240, such asan Everhart-Thornley detector, detects secondary electrons emitted fromthe sample 214 to acquire a secondary electron image in step 112. Thesignal from secondary electron detector 240 is processed by controller250, which includes a processor 252, a program memory 254 for storingcomputer instructions and data memory 256. The secondary electron imageis used to create an image of the sample on display 258.

As the electron beam is scanning, in step 114 an electrical signal isacquired. For example, the signal may be the output current, voltage, orpower of power supply 224. As the electrons in the scanning beam impacta point on the sample, the electrons heat a resistive defect to producea significant resistance change. By applying a voltage to force currentthrough this path the change in resistance is evident in a change in thecurrent. The change in current can be measured, or the change in voltageor power of a constant current power supply can be measure. The focusedelectron beam, having a spot size on the order of a several nanometers,can localize the resistive connection with high lateral resolution. Thischange in power supply output is amplified to become the EBIRCH signal.If an AC signal was applied, a change in impedance is measured caused bythe heating is measured. This change may be due to a change inresistance, capacitance, or inductance of the defect.

In step 116, the EBIRCH signal is analyzed to find changes in the powersupply that would indicate a defect. Such changes could includeincreases or decreases in the power supply power or voltage. In step118, the location of defect is determined by the position of theelectron beam in its scan when the defect was detected. In step 120, thedefect location is overlaid onto the SEM image.

Sequential EBIRCH can be used to perform a failure analysis of resistivedefects at each process step. The electrical signal can be applied tothe device under test (DUT) using package contacts, micro-probing andnano-probing of depackaged and delayered IC's. FIG. 3 shows aconfiguration of a system 300 for locating a defect on a front side of adepackaged and delayered sample 302. Scanning electron microscope 304produces an electron beam 306 which is rastered as indicated by arrows308 across the sample positioned on an XYZ sample positioner 310. Probes312 apply a signal to sample 302 and detect a change in the electricalcharacteristics of the sample. As shown in FIG. 3, EBIRCH can be done ontop metal layers of original or delayered IC using front side electronbeam stimulation.

FIG. 4 shows a configuration for detecting resistive defects on thebackside of an integrated circuit 402. In this configuration, the bottomlayers of interconnect, such as M0, M1, etc., can be more readilyaccessed. Accessing the bottom layer of interconnects may requiresignificant thinning, or even complete removal, of the siliconsubstrate. For example, the IC 402 substrate may be thinned to about 100nm or the silicon is completely removed to access bottom levels ofinterconnect. The IC 402 is positioned upside down on a probe card 404positioned on a sample positioner 310. Probe card 404 contacts the frontside of upside down integrated circuit 402 to apply electrical signalsto IC 402 while the electron beam 306 rasters across the backside.

FIG. 5 shows a system 500 for detecting a circuit defect on a sample502. An electron beam 504 scans across an insulating region 501 of thesample 506 while a voltage is applied from a power supply 508 through aprobe 509 to a surface conductor 510 that is in electrical contact withthe buried conductor 512 having a resistive metal defect 514. A probe515 completes the electrical circuit through the device, and the currentthrough the circuit is measured at detector 522. As electron beam 504impacts sample 502, the electrons are scattered in an interaction volume520, which is shown not extending to resistive defect 514 indicatingthat the electrons in the beam are absorbed by the insulating material501 before reaching conductor 512. The electron beam 504 heats theinteraction volume, and the heat diffuses to heat up resistive defect514, resulting in a change in current in current detector 522. WhileFIG. 5 shows current detector 522 in contact with probe 515, the signalcould be measured at power supply 508.

FIG. 6A shows a sample 602 having a serpentine conductor 604 with aresistive short 606 between two lines. A current from power supply 610is applied through probe 612 and the circuit is completed through probe614 which connects to a meter 616 that measures a change in currentcaused by heating of resistive short 606. As the electron beam scanssample 602, an image as shown in FIG. 6B is formed with the brightnesspixels of the image corresponding to the change in current at thedifferent points in the raster scan. The defect of FIG. 6B is thensuperimposed onto the SEM image in FIG. 6A.

FIG. 7 illustrates schematically a defect identification andlocalization system 700 using EBIRCH for detecting and localizing acircuit defect comprising a resistive line on a sample 702. An electronbeam 704 scans across the surface of insulating region 701 of the sample702 while a voltage is applied from a voltage supply 708 through a probe709 to a conductor 710 that is in electrical contact with a resistivevia 714. A probe 715 completes the electrical circuit through thedevice, and the current through the circuit is measured at detector 722.As electron beam 704 impacts sample 702, the electrons are scattered inan interaction volume 720, which is shown not extending to contact aconductor 730 above resistive defect 714. The electron beam 704 heats aportion of insulating region 701 and conductor 730. Also, charge will beinjected into conductor 730. The amount of charge injected is relativelysmall, and the primary effect on the test current comes from the changein temperature of the resistive via 714 caused by the energy depositedby the electron beam.

FIG. 8 is an image 802 showing an example of front side EBIRCH used toidentify and localization a resistive defect in a 50 nm metal lines 804.Image 802 comprises an overlay of a secondary electron SEM grey-scaleimage and an EBIRCH gray-scale image. In the SEM image, the secondaryelectron current determines the brightness of each pixel—in the EBIRCHimage, the change in current through the metal lines (at constantapplied voltage) determines the brightness of each pixel, that is,lighter spots indicate elevated line resistance or/and reduced current.A nano-probe within the SEM vacuum chamber was contacted to the circuitto apply the test voltage.

FIG. 8 shows metal line defects 810 (shown as light features) locatednear dark, circular layout features 812. The horizontal smearing 814 ofthe light features representing defects may be caused by the limitedbandwidth of the signal amplifier when the pixel dwell time is small or,when the pixel dwell time is large, the trace stays hot for time muchgreater than the pixel dwell time. EBIRCH signal can be positive(resistance increases with heating) or negative (resistance decreaseswith heating). In FIG. 8, the lighter regions 810 show positive EBIRCHsignal for two spots on this image.

FIG. 9 shows a low noise EBIRCH implementation 900 using a SQUIDmagnetic sensor 902 to reduce noise. Elements of system 900 that are thesame as those shown in FIG. 5 are shown with the same reference numbers.The IC is fabricated on a silicon substrate 910 which is mounted onSQUID sensor 902. SQUID sensor 902 can also be used in combination withelectron beam pulsing and a lock-in amplification (not shown) to furtherimprovement of signal-to-noise ratio. The output of the SQUID sensor iselectrically connected to conductors 914, one of which is connected to acurrent meter. The SQUID amplifies the change in current as the electronbeam scans the IC. The SQUID 902 and the e-beam 504 should be closelyco-axial. Then the DUT would be on a stage and moved between these. Theelectrical output would not need to be on the stage. The stage z travelmay not require z travel for the SQUID. The figure shows the IC stackedon top of the SQUID. The sample IC and SQUID would be moved together asone unit on the sample stage. The SQUID electrical output signal couldbe transmitted by conventional cables connected to the device or forconvenience the SQUID could be connected to power via the nanoprobingsystem probes.

As shown above, EBIRCH is capable of detecting resistive line defects(FIG. 5), line to line resistive shorts (FIG. 6) and line to viaresistive defects (FIG. 7). EBIRCH signal to noise ratio can be improvedusing modulated electron beam and lock-in amplifier, using a SQUIDmagnetic sensor for current measurements (FIG. 9) or any other methodsknown in the art. A lock-in amplifier is useful when the DUT isunstable. In that case, the electron beam is pulsed typically at a rateof between about 50 kHz and about 100 Hz using a beam blanker. TheLock-in amplifier operates at the same frequency as the beam blanker.

While the embodiments described above use an electron beam for localheating, an ion beam could also be used. Such implementations may beimplemented in focused ion beam (FIB) or dual beam systems as well aswith a helium or neon ion microscope. Using a plasma ion source allowsfor the use of a wide variety of ions. To reduce ion damage, lighterions may be preferred.

Other electrical techniques can be used to defect resistance changes.For example, a variation of EBIRCH such as Electron Beam Induced VoltageAlternation or EBIVA, works similar to the way TIVA works, wherehigh-current electron beam is used to modify thermally resistance offaulty pathways of IC.

Some embodiments of the invention provide a method of locating resistivedefects in a circuit, comprising:

forcing a test current through a resistive defect in a circuit;

scanning a charged particle beam across a portion of the circuitincluding the resistive defect, the charged particle beam locallyheating the circuit at the impact point;

detecting a change in resistivity of the resistive defect by detecting achange in the test current forced through the resistive defect as theresistive defect is heated by the charged particle beam; and

determining the position of the resistive defect from the position ofthe charged particle beam in its scan when the change in resistivity isdetected.

In some embodiments, forcing the test current through a resistive defectin a circuit comprises forcing a test current that is greater inmagnitude than the current of the electron beam.

In some embodiments, forcing the test current through a resistive defectcomprises forcing a current between two electrical contact probes, withthe entire test current passing through the resistive defect.

In some embodiments, forcing a current through a resistive defect in acircuit comprises forcing the current through a resistive defect in anunpowered integrated circuit.

In some embodiments, forcing a current through a resistive defect in acircuit comprises forcing the test current through only a portion of thecircuit.

In some embodiments, detecting a change in the test current forcedthrough the resistive defect includes detecting a change in the testcurrent that is greater than 100 times the electron beam current.

In some embodiments, detecting a change in the test current forcedthrough the resistive defect includes detecting a change in the testcurrent that is between 1,000 and 100,000 greater than the electron beamcurrent.

In some embodiments, the charged particle beam is an electron beam.

In some embodiments, forcing a current through a resistive defect in acircuit comprises contacting a probe to a conductor on an integratedcircuit.

In some embodiments, determining the position of the resistive defectfrom the position of the charged particle beam in its scan when thechange in resistivity is detected comprises forming a resistivity imagerepresenting the circuit in which the brightness of pixels of theresistivity image correspond to the change in resistivity atcorresponding positions of the charged particle beam on the circuit.

Some embodiments further comprise detecting secondary or backscatteredelectrons as the electron beam scans the circuit to form an electronimage of the circuit and further comprising superimposing theresistivity image onto the electron image.

Some embodiments further comprise overlaying superimposing a specificcircuit feature or CAD coordinates onto the electron image.

In some embodiments, forcing a test current through a resistive defectin a circuit comprises applying a current from a constant current powersupply and in which detecting a change in resistivity of the resistivedefect by detecting a change in the power or voltage output of theconstant current power supply.

In some embodiments, the electron beam comprises a current greater than0.1 nA.

In some embodiments, the electron beam comprises a current of between 1nA and 20 nA and the electrons in the beam have a landing energy ofbetween 500 eV and 10,000 eV.

In some embodiments, the dwell time of the electron beam at each pixelis between 0.1 μs and 1,000 μs and the electron beam deposits energy ofbetween 0.3 pJ to 30 pJ per pixel during each dwell period.

Some embodiments further comprise removing a passivation layer of theintegrated circuit before directing the electron beam towards theintegrated circuit.

In some embodiments, scanning an electron beam across a portion of theintegrated circuit includes directing an electron beam to impact aninsulating layer over the resistive fault.

In some embodiments, the electron beam is characterized by aninteraction volume and in which scanning an electron beam across aportion of a circuit includes scanning an electron beam such that theinteraction volume does not contact the resistive defect.

In some embodiments, the electron beam is characterized by aninteraction volume and in which scanning an electron beam across aportion of a circuit includes scanning an electron beam such that theinteraction volume contacts the resistive defect.

In some embodiments forcing a current through a resistive defect in acircuit includes applying an AC voltage to the circuit; and detecting achange in the electrical properties of the defect comprises detecting achange in impedance of the circuit as the defect is heated by theelectron beam.

In some embodiments forcing a current through a resistive defect in acircuit includes applying an DC voltage to the circuit; and detecting achange in the electrical properties of the defect comprises by detectinga change in resistivity.

In some embodiments, detecting a change in the test current forcedthrough the resistive defect comprises amplifying a change in the testsignal by a factor of less than 10⁶.

In some embodiments, amplifying a change in the test signal by a factorof less than 10⁶ comprises amplifying a change in the test signal bybetween 10³ and 10⁴.

In some embodiments, scanning a charged particle beam across a portionof the circuit includes pulsing the electron beam and in which detectinga change in the test current forced through the resistive defectincludes using a lock-in amplifier.

In some embodiments, detecting a change in the test current forcedthrough the resistive defect includes using a SQUID.

Some embodiments provide a system for determining a fault in a circuit,comprising:

a charged particle source;

a charged particle column for focusing the charged particle beam onto acircuit in a vacuum chamber;

a signal source for forcing a current through a portion of theintegrated circuit;

a sensor for detecting a change in the current as the charged particlebeam is scanned over the integrated circuit; and

a processor for controlling the system to perform one or more of thesteps of any of the methods described above.

In some embodiments, the charged particle source comprises an electronsource.

In some embodiments, the charged particle source comprises an ionsource.

In some embodiments, the sensor includes an amplifier having a gain ofless than 10⁶.

In some embodiments, the amplifier has a gain of less than 10⁴.

In some embodiments, the amplifier comprises a SQUID or a lock-inamplifier.

The methods described herein can be applied manually or can be automatedand some or all of the steps can be performed under computer control.

A preferred method or apparatus of the present invention has many novelaspects, and because the invention can be embodied in different methodsor apparatuses for different purposes, not every aspect need be presentin every embodiment. Moreover, many of the aspects of the describedembodiments may be separately patentable. The invention has broadapplicability and can provide many benefits as described and shown inthe examples above. The embodiments will vary greatly depending upon thespecific application, and not every embodiment will provide all of thebenefits and meet all of the objectives that are achievable by theinvention.

It should be recognized that embodiments of the present invention can beimplemented via computer hardware, a combination of both hardware andsoftware, or by computer instructions stored in a non-transitorycomputer-readable memory. The methods can be implemented in computerprograms using standard programming techniques—including anon-transitory computer-readable storage medium configured with acomputer program, where the storage medium so configured causes acomputer to operate in a specific and predefined manner—according to themethods and figures described in this Specification. Each program may beimplemented in a high level procedural or object oriented programminglanguage to communicate with a computer system. However, the programscan be implemented in assembly or machine language, if desired. In anycase, the language can be a compiled or interpreted language. Moreover,the program can run on dedicated integrated circuits programmed for thatpurpose.

Further, methodologies may be implemented in any type of computingplatform, including but not limited to, personal computers,mini-computers, main-frames, workstations, networked or distributedcomputing environments, computer platforms separate, integral to, or incommunication with charged particle tools or other imaging devices, andthe like. Aspects of the present invention may be implemented in machinereadable code stored on a non-transitory storage medium or device,whether removable or integral to the computing platform, such as a harddisc, optical read and/or write storage mediums, RAM, ROM, and the like,so that it is readable by a programmable computer, for configuring andoperating the computer when the storage media or device is read by thecomputer to perform the procedures described herein. Moreover,machine-readable code, or portions thereof, may be transmitted over awired or wireless network. The invention described herein includes theseand other various types of non-transitory computer-readable storagemedia when such media contain instructions or programs for implementingthe steps described above in conjunction with a microprocessor or otherdata processor. The invention also includes the computer itself whenprogrammed according to the methods and techniques described herein.

Computer programs can be applied to input data to perform the functionsdescribed herein and thereby transform the input data to generate outputdata. The output information is applied to one or more output devicessuch as a display monitor. In preferred embodiments of the presentinvention, the transformed data represents physical and tangibleobjects, including producing a particular visual depiction of thephysical and tangible objects on a display.

Although much of the previous description is directed at mineral samplesfrom drill cuttings, the invention could be used to prepare samples ofany suitable material. The terms “work piece,” “sample,” “substrate,”and “specimen” are used interchangeably in this application unlessotherwise indicated. Further, whenever the terms “automatic,”“automated,” or similar terms are used herein, those terms will beunderstood to include manual initiation of the automatic or automatedprocess or step.

In the following discussion and in the claims, the terms “including” and“comprising” are used in an open-ended fashion, and thus should beinterpreted to mean “including, but not limited to . . . .” To theextent that any term is not specially defined in this specification, theintent is that the term is to be given its plain and ordinary meaning.The accompanying drawings are intended to aid in understanding thepresent invention and, unless otherwise indicated, are not drawn toscale.

The various features described herein may be used in any functionalcombination or sub-combination, and not merely those combinationsdescribed in the embodiments herein. As such, this disclosure should beinterpreted as providing written description of any such combination orsub-combination.

Although the present invention and its advantages have been described indetail, it should be understood that various changes, substitutions andalterations can be made to the embodiments described herein withoutdeparting from the scope of the invention as defined by the appendedclaims. Moreover, the scope of the present application is not intendedto be limited to the particular embodiments of the process, machine,manufacture, composition of matter, means, methods and steps describedin the specification. As one of ordinary skill in the art will readilyappreciate from the disclosure of the present invention, processes,machines, manufacture, compositions of matter, means, methods, or steps,presently existing or later to be developed that perform substantiallythe same function or achieve substantially the same result as thecorresponding embodiments described herein may be utilized according tothe present invention. Accordingly, the appended claims are intended toinclude within their scope such processes, machines, manufacture,compositions of matter, means, methods, or steps.

1. A method of locating resistive defects in a circuit, comprising:forcing a test current through a resistive defect in a circuit; scanninga charged particle beam across a portion of the circuit including theresistive defect, the charged particle beam locally heating the circuitat the impact point; detecting a change in resistivity of the resistivedefect by detecting a change in the test current forced through theresistive defect as the resistive defect is heated by the chargedparticle beam; and determining the position of the resistive defect fromthe position of the charged particle beam in its scan when the change inresistivity is detected.
 2. The method of claim 1 in which forcing thetest current through a resistive defect in a circuit comprises forcing atest current that is greater in magnitude than the current of theelectron beam.
 3. The method of claim 1 in which forcing the testcurrent through a resistive defect comprises forcing a current betweentwo electrical contact probes, with the entire test current passingthrough the resistive defect.
 4. The method of claim 1 in which theforcing a current through a resistive defect in a circuit comprisesforcing the test current through only a portion of the circuit.
 5. Themethod of claim 1 in which detecting a change in the test current forcedthrough the resistive defect includes detecting a change in the testcurrent that is greater than 100 times the electron beam current.
 6. Themethod of claim 1 in which the charged particle beam is an electronbeam.
 7. The method of claim 1 in which determining the position of theresistive defect from the position of the charged particle beam in itsscan when the change in resistivity is detected comprises forming aresistivity image representing the circuit in which the brightness ofpixels of the resistivity image correspond to the change in resistivityat corresponding positions of the charged particle beam on the circuit.8. The method of claim 7 further comprising detecting secondary orbackscattered electrons as the electron beam scans the circuit to forman electron image of the circuit and further comprising superimposingthe resistivity image onto the electron image.
 9. The method of claim 8further comprising superimposing a specific circuit feature or CADcoordinates onto the electron image
 10. The method of claim 1 in whichforcing a test current through a resistive defect in a circuit comprisesapplying a current from a constant current power supply and in whichdetecting a change in resistivity of the resistive defect by detecting achange in the power or voltage output of the constant current powersupply.
 11. The method of claim 1 in which the electron beam comprises acurrent greater than 0.1 nA.
 12. The method of claim 11 in which theelectron beam comprises a current of between 1 nA and 20 nA and theelectrons in the beam have a landing energy of between 500 eV and 10,000eV.
 13. The method of claim 1 in which the dwell time of the electronbeam at each pixel is between 0.1 μs and 1,000 μs and the electron beamdeposits energy of between 0.3 pJ to 30 pJ per pixel during each dwellperiod.
 14. The method of claim 1 further comprising removing apassivation layer of the integrated circuit before directing theelectron beam towards the integrated circuit.
 15. The method of claim 1in which the electron beam is characterized by an interaction volume andin which scanning an electron beam across a portion of a circuitincludes scanning an electron beam such that the interaction volumecontacts the resistive defect.
 16. The method of claim 1 in which:forcing a current through a resistive defect in a circuit includesapplying an AC voltage to the circuit; and detecting a change in theelectrical properties of the defect comprises detecting a change inimpedance of the circuit as the defect is heated by the electron beam.17. The method of claim 1 in which: forcing a current through aresistive defect in a circuit includes applying an DC voltage to thecircuit; and detecting a change in the electrical properties of thedefect comprises by detecting a change in resistivity.
 18. The method ofclaim 1 in which detecting a change in the test current forced throughthe resistive defect comprises amplifying a change in the test signal bybetween 10³ and 10⁴.
 19. The method of claim 1 in which scanning acharged particle beam across a portion of the circuit includes pulsingthe electron beam and in which detecting a change in the test currentforced through the resistive defect includes using a lock-in amplifier.20. A system for determining a fault in a circuit, comprising: a chargedparticle source; a charged particle column for focusing the chargedparticle beam onto a circuit in a vacuum chamber; a signal source forforcing a current through a portion of the integrated circuit; a sensorfor detecting a change in the current as the charged particle beam isscanned over the integrated circuit; and a system processor forcontrolling one or more aspects of the system, in which the system isconfigured to perform the steps of claim
 1. 21. The system of claim 20in which the charged particle source comprises an electron source or anion source.
 22. The system of claim 20 in which the sensor includes anamplifier having a gain of less than 10⁶.
 23. The system of claim 20 inwhich the amplifier comprises a SQUID or a lock-in amplifier.